Electron beam lithographic machines are being used to make prototype devices with submicrometer critical dimensions. However, building these devices requires developing new techniques of etching, and pattern overlay. Experience with MOS devices illustrates these needs. Plasma etching and self-aligning ion implantation techniques are used for dimensional control. Electron beam alignment strategies, involving the use of high-atomic-number benchmarks, have been developed for accurate registration of patterns. These techniques have been successfully applied to various modifications of MOS technology such as n- or p-channel and CMOS/SOS. Testing prototype devices, such as ring oscillators and charge coupled devices, has confirmed the higher speed and lower power consumption expected from reducing the size of these structures.