High-speed Schottky-barrier pMOSFET with fT=280 GHz

被引:83
作者
Fritze, M [1 ]
Chen, CL
Calawa, S
Yost, D
Wheeter, B
Wyatt, P
Keast, CL
Snyder, J
Larson, J
机构
[1] MIT, Lincoln Lab, Lexington, MA 02420 USA
[2] Spinnaker Semicond, Eden Prairie, MN 55344 USA
关键词
microwave MOSFET; Schottky-barrier; MOSFET; short-channel MOSFET;
D O I
10.1109/LED.2004.826294
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
High-speed results on sub-30-nm gate length pMOSFETs with platinum silicide Schottky-barrier source and drain are reported. With inherently low series resistance and high drive current, these deeply scaled transistors are promising for high-speed analog applications. The fabrication process simplicity is compelling with no implants required. A sub-30-nm gate length pMOSFET exhibited a cutoff frequency of 280 GHz, which is the highest reported to date for a silicon MOS transistor. Off-state leakage current can be easily controlled by augmenting the Schottky barrier height with an optional blanket As implant. Using this approach, good digital performance was also demonstrated.
引用
收藏
页码:220 / 222
页数:3
相关论文
共 11 条
[1]  
Chang CY, 2001, 2001 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, P89, DOI 10.1109/VLSIT.2001.934961
[2]   CMOS technology for MS/RF SoC [J].
Diaz, CH ;
Tang, DD ;
Sun, J .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (03) :557-566
[3]   Limits of strong phase shift patterning for device research [J].
Fritze, M ;
Mallen, R ;
Wheeler, B ;
Yost, D ;
Snyder, JP ;
Kasprowicz, B ;
Eynon, B ;
Liu, HY .
OPTICAL MICROLITHOGRAPHY XVI, PTS 1-3, 2003, 5040 :327-343
[4]   A computational study of thin-body, double-gate, Schottky barrier MOSFETs [J].
Guo, J ;
Lundstrom, MS .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49 (11) :1897-1902
[5]   Gate-source-drain architecture impact on DC and RF performance of sub-100-nm elevated source/drain NMOS transistors [J].
Jeamsaksiri, W ;
Jurczak, M ;
Grau, L ;
Linten, D ;
Augendre, E ;
De Potter, M ;
Rooyackers, R ;
Wambacq, P ;
Badenes, G .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (03) :610-617
[6]   Complementary silicide source/drain thin-body MOSFETs for the 20nm gate length regime [J].
Kedzierski, J ;
Xuan, PQ ;
Anderson, EH ;
Bokor, J ;
King, TJ ;
Hu, CM .
INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, :57-60
[7]   RF MOSFET: recent advances, current status and future trends [J].
Liou, JJ ;
Schwierz, F .
SOLID-STATE ELECTRONICS, 2003, 47 (11) :1881-1895
[8]   Cutoff frequency and propagation delay time of 1.5-nm gate oxide CMOS [J].
Momose, HS ;
Morifuji, E ;
Yoshitomi, T ;
Ohguro, T ;
Saito, M ;
Iwai, H .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2001, 48 (06) :1165-1174
[9]   EXPERIMENTAL INVESTIGATION OF A PTSI SOURCE AND DRAIN FIELD-EMISSION TRANSISTOR [J].
SNYDER, JP ;
HELMS, CR ;
NISHI, Y .
APPLIED PHYSICS LETTERS, 1995, 67 (10) :1420-1422
[10]   CMOS design near the limit of scaling [J].
Taur, Y .
IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 2002, 46 (2-3) :213-222